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X-ORIGINAL-URL:https://www.bnmit.org
X-WR-CALDESC:Events for 
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TZID:Asia/Kolkata
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TZOFFSETFROM:+0530
TZOFFSETTO:+0530
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DTSTART:20250101T000000
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BEGIN:VEVENT
DTSTART;VALUE=DATE:20250704
DTEND;VALUE=DATE:20250705
DTSTAMP:20260512T073800
CREATED:20250708T034849Z
LAST-MODIFIED:20250708T034849Z
UID:27975-1751587200-1751673599@www.bnmit.org
SUMMARY:Technical Talk on Artificial Intelligence in Drug Discovery on  4th July 2025
DESCRIPTION:BNMIT IEEE Signal Processing Society organized a technical talk on “Artificial Intelligence in Drug Discovery: Bridging High-Content Screening to Target Discovery” on 4th July 2025.\nThe session was delivered by Prof. Arvind Rao from the University of Michigan\, who highlighted the role of AI in accelerating drug discovery using high-content screening techniques. The talk covered AI-driven microscopy analysis\, evaluation of cellular responses\, and practical strategies for integrating AI into biomedical research. \n  \nJuly 4\, 2025 \nVenue: Room A215\, B.N.M. Institute of Technology\, Bengaluru \nTime: 11:00 AM \n 
URL:https://www.bnmit.org/event/technical-talk-on-artificial-intelligence-in-drug-discovery-on-4th-july-2025/
LOCATION:BNMIT Campus
CATEGORIES:ECE DEPT,Events,Home
ATTACH;FMTTYPE=image/jpeg:https://www.bnmit.org/wp-content/uploads/2025/07/7-scaled.jpg
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BEGIN:VEVENT
DTSTART;VALUE=DATE:20250717
DTEND;VALUE=DATE:20250719
DTSTAMP:20260512T073800
CREATED:20250728T035049Z
LAST-MODIFIED:20250728T035115Z
UID:28188-1752710400-1752883199@www.bnmit.org
SUMMARY:Analog and Digital Design using Cadence tools on 17th July 2025 to 18th July 2025
DESCRIPTION:The Department of Electronics and Communication Engineering\, BNMIT\, in association with IEEE Circuits and Systems Society (CAS) and IEEE Nanotechnology Council\, successfully conducted a Two-Day Workshop on Custom IC Design Flow on 17th and 18th July 2025. The workshop\, led by Mr. Rakesh from Entuple\, provided hands-on training on Cadence EDA tools with Day 1 focused on Analog Design (NAND gate-based schematic\, simulation\, and layout) and Day 2 dedicated to Digital Design (RTL synthesis\, physical implementation\, and GDSII generation). The sessions enriched participants’ understanding of practical VLSI workflows for research and projects. \n  \nJuly 17\, 2025 to July 18\, 2025 \nVenue: Room N504\, B.N.M. Institute of Technology\, Bengaluru \nTime: 9.00am to 4:00pm \n 
URL:https://www.bnmit.org/event/analog-and-digital-design-using-cadence-tools/
LOCATION:BNMIT Campus
CATEGORIES:ECE DEPT,Events,Home
ATTACH;FMTTYPE=image/jpeg:https://www.bnmit.org/wp-content/uploads/2025/07/ECE-EVENTS-17-JULY.jpg
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BEGIN:VEVENT
DTSTART;VALUE=DATE:20250721
DTEND;VALUE=DATE:20250810
DTSTAMP:20260512T073800
CREATED:20250728T040646Z
LAST-MODIFIED:20250728T044924Z
UID:28192-1753056000-1754783999@www.bnmit.org
SUMMARY:Design\, Modeling\, Simulation of Digital Circuits using Verilog on 21st July 2025 to 9th August 2025
DESCRIPTION:The Department of Electronics and Communication Engineering\, BNMIT\, in association with IEEE Circuits and Systems Society (CAS)\, IEEE Nanotechnology Council\, and IEEE Robotics & Automation Society\, organized a 3-week internship on “Design\, Modeling\, and Simulation of Digital Circuits using Verilog” from 21st July to 9th August 2025. The program also included Analog and Digital Design using Cadence Tools\, conducted by experts from Cranes Varsity. Students gained hands-on experience in Verilog HDL\, covering combinational and sequential circuits\, FSMs\, counters\, and arithmetic circuits\, along with testbench creation\, functional verification\, and synthesis techniques for real-world applications. \n  \nJuly 21\, 2025 to August 09\, 2025 \nVenue: Room N505\, B.N.M. Institute of Technology\, Bengaluru \nTime: 9.00am to 4:00pm \n 
URL:https://www.bnmit.org/event/design-modeling-simulation-of-digital-circuits-using-verilog/
LOCATION:BNMIT Campus
CATEGORIES:ECE DEPT,Events,Home
ATTACH;FMTTYPE=image/jpeg:https://www.bnmit.org/wp-content/uploads/2025/07/ECE-EVENTS-INTERNSHIP-21JULY.jpg
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BEGIN:VEVENT
DTSTART;VALUE=DATE:20250721
DTEND;VALUE=DATE:20250810
DTSTAMP:20260512T073800
CREATED:20250728T041331Z
LAST-MODIFIED:20250728T041356Z
UID:28197-1753056000-1754783999@www.bnmit.org
SUMMARY:Modeling and Analyzing Dynamic Systems using MATLAB Simulink on 21st July 2025 to 9th August 2025
DESCRIPTION:The Department of Electronics and Communication Engineering\, BNMIT\, in association with the IEEE Signal Processing Society\, IEEE Geoscience & Remote Sensing Society (GRSS)\, and ISTE\, successfully conducted a hands-on internship on “Modeling and Analyzing Dynamic Systems using MATLAB Simulink.”\nThe program aimed to strengthen fundamentals and applications of communication systems\, signal processing\, and control through simulation-driven learning.\nObjectives included understanding communication system elements; exploring modems\, ADC/DAC interfaces\, and control (PID) concepts; and applying these in the SIMULINK environment.\nParticipants designed and simulated end-to-end models\, analyzed system behavior\, and translated theory into practical engineering insights. \n  \nJuly 21\, 2025 to August 09\, 2025 \nVenue: Room N401\, B.N.M. Institute of Technology\, Bengaluru \nTime: 9.00am to 4:00pm \n 
URL:https://www.bnmit.org/event/modeling-and-analyzing-dynamic-systems-using-matlab-simulink/
LOCATION:BNMIT Campus
CATEGORIES:ECE DEPT,Events,Home
ATTACH;FMTTYPE=image/jpeg:https://www.bnmit.org/wp-content/uploads/2025/07/ECE-EVENTS-MATLAB.jpg
END:VEVENT
BEGIN:VEVENT
DTSTART;VALUE=DATE:20250721
DTEND;VALUE=DATE:20250810
DTSTAMP:20260512T073801
CREATED:20250728T041620Z
LAST-MODIFIED:20250728T041833Z
UID:28199-1753056000-1754783999@www.bnmit.org
SUMMARY:Analog Circuit Design using LTSpice on 21st July 2025 to 9th August 2025
DESCRIPTION:The Department of Electronics and Communication Engineering\, BNMIT\, in association with IEEE Communications Society (ComSoc)\, IEI\, and the IEEE Student Chapter\, successfully conducted a 3-week internship on “Analog Circuit Design using LTSpice.”\nThe program aimed to strengthen students’ fundamentals of analog electronics and electrical networks through hands-on simulation.\nKey objectives included designing and simulating BJT/MOSFET amplifiers\, oscillator circuits\, operational amplifier-based circuits\, and various electrical networks using LTSpice.\nThe internship enabled participants to gain practical skills in analog circuit design\, bridging the gap between classroom learning and real-world applications. \n  \nJuly 21\, 2025 to August 09\, 2025 \nVenue: Room N402\, B.N.M. Institute of Technology\, Bengaluru \nTime: 9.00am to 4:00pm \n 
URL:https://www.bnmit.org/event/analog-circuit-design-using-ltspice/
LOCATION:BNMIT Campus
CATEGORIES:ECE DEPT,Events,Home
ATTACH;FMTTYPE=image/jpeg:https://www.bnmit.org/wp-content/uploads/2025/07/ECE-EVENTS-LTSpice.jpg
END:VEVENT
BEGIN:VEVENT
DTSTART;VALUE=DATE:20250725
DTEND;VALUE=DATE:20250726
DTSTAMP:20260512T073801
CREATED:20250816T053826Z
LAST-MODIFIED:20250816T053826Z
UID:28254-1753401600-1753487999@www.bnmit.org
SUMMARY:Inside the Network: Life of a Packet & Routing Fundamental on 25th July 2025
DESCRIPTION:The Department of ECE\, BNMIT\, in association with IEEE Signal Processing Society\, IEEE WIE & IIC\, organized a workshop on “Inside the Network: Life of a Packet & Routing Fundamentals” on 25th July 2025. The session was conducted by Ms. Sanyukta S Pawaskar\, Technical Consulting Engineer at Cisco and Joint Secretary of IEEE WIE AG\, Bangalore Section. The event provided valuable insights into packet life cycle and routing fundamentals\, enriching participants’ networking knowledge. \n  \nJuly 25\, 2025. \nVenue: Room A215\, B.N.M. Institute of Technology\, Bengaluru \nTime: 11.00 am \n 
URL:https://www.bnmit.org/event/inside-the-network-life-of-a-packet-routing-fundamental-on-25th-july-2025/
LOCATION:BNMIT Campus
CATEGORIES:ECE DEPT,Events,Home
ATTACH;FMTTYPE=image/jpeg:https://www.bnmit.org/wp-content/uploads/2025/08/ECE-EVENT-JULY.jpg
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