BEGIN:VCALENDAR
VERSION:2.0
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X-ORIGINAL-URL:https://www.bnmit.org
X-WR-CALDESC:Events for 
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TZID:Asia/Kolkata
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TZOFFSETFROM:+0530
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DTSTART:20250101T000000
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DTSTART;TZID=Asia/Kolkata:20250902T170000
DTEND;TZID=Asia/Kolkata:20250902T180000
DTSTAMP:20260404T093135
CREATED:20250912T092350Z
LAST-MODIFIED:20250912T092401Z
UID:29034-1756832400-1756836000@www.bnmit.org
SUMMARY:NXP Campus Connect – Webinar on SRAM and ROM IP Architecture and Design.
DESCRIPTION:The Department of ECE\, BNMIT\, in association with NXP Semiconductors\, organized a webinar under the NXP Campus Connect initiative on SRAM and ROM IP Architecture and Design on 2nd September 2025. The session was delivered by Mr. Rajat Kohli\, Sr. Principal Engineer / Design Manager e-Memories\, NXP Semiconductors. The webinar introduced participants to the basic building blocks\, operations\, and functionality of SRAM and ROM IPs\, while also highlighting how different architectural choices impact Power\, Performance\, and Area (PPA) of memory IPs. \n  \nSeptember 02\, 2025. \nVenue: Room A215\, B.N.M. Institute of Technology\, Bengaluru \nTime: 05.00 to 6.00pm \n 
URL:https://www.bnmit.org/event/nxp-campus-connect-webinar-on-sram-and-rom-ip-architecture-and-design/
LOCATION:BNMIT Campus
CATEGORIES:ECE DEPT,Events,Home
ATTACH;FMTTYPE=image/png:https://www.bnmit.org/wp-content/uploads/2025/09/ECE-webinar-nxp.png
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