Engineering, B.N.M. Institute of Technology, Bengaluru, hosted a Five-Day Offline Boot Camp on “RTL, IP Integration & SOC Sign-off” organized by the National Institute of Electronics and Information Technology (NIELIT), Calicut and funded by the Ministry of Electronics and Information Technology (MeitY), Government of India.

The boot camp was designed to provide students with industry-oriented exposure to VLSI design flow and System-on-Chip (SoC) development methodologies. The program focused on key concepts including Register Transfer Level (RTL) design, IP integration techniques, and SoC sign-off processes, enabling students to understand the practical workflow followed in semiconductor industries.

The sessions were conducted by Mr. Sreejeesh S. G., Senior Technical Officer, National Institute of Electronics and Information Technology (NIELIT) and Mr. Rithwik V., Project Engineer, National Institute of Electronics and Information Technology (NIELIT). The resource persons provided hands-on learning experiences and guided participants through industry practices, design methodologies, and practical implementation aspects of VLSI system design.

Throughout the five-day program, students gained valuable exposure to semiconductor design concepts, developed technical skills relevant to the VLSI domain, and enhanced their understanding of contemporary SoC design and integration processes. The boot camp served as an effective platform to bridge academic learning with current industry requirements.

Date & Time: 29.06.2026 to 03.07.2026 | 9:30 a.m. 12.30 and 1.30 to 4.30

Venue:N401 Seminar Hall, B.N.M. Institute of Technology

Participants: Students of B.N.M. Institute of Technology