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SDP Report on “Design & prototype of power electronic converters and controllers using Multisim software”

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SDP Report on “Design & prototype of power electronic converters and controllers using Multisim software”

July 10, 2020 - August 20, 2020

    This post was last updated on       August 3rd, 2021

The Department of Electrical & Electronics Engineering had organized a Virtual Skill Development Program (SDP) on “Design & prototype of power electronic converters and controllers using Multisim software”. SDP was aimed at providing hands-on skills to the 2nd year students in the area of design, simulation and prototype of Electrical and Electronic circuits specially focusing on analog & digital circuits, power converters and controllers using multisim software. The SDP Program was held on Microsoft teams platform from 29th  July 2020 to 18th August 2020 (50 Hrs).The sessions focussed on introducing the prominent features of Multisim software such as Introduction to virtual components and libraries, basics of circuit building, Simulation types, settings, analysis of circuits, Steps involved in building PCB layout and so on. All these features were demonstrated by considering examples circuits. The students downloaded evaluation version of Multisim software, performed simulation and analysis of circuits during the session. The discussions held during the sessions helped the students to understand the design in a better way. Some of the circuits simulated during the sessions were Series-parallel RLC circuits, Rectifiers, RC coupled amplifier, Colpitts oscillator, operational amplifier circuits, Full adder, Digital Counters, BCD to segmental converters, Voltage regulators, Buck-Boost converters, PI controllers using op-amps, H-bridge motor Driver circuits and so on. Few application based circuits such as flashing of LEDs, square wave generator, Motor speed control, H-Bridge driver circuit for DC motor, stop watch circuit, automatic headlight control using LDR, Battery level indicator circuits were also simulated and outputs were shown during sessions.

Details

Start:
July 10, 2020
End:
August 20, 2020
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